irqchip/gic-v5: Immediately exec priority drop following activate
Default status is the baseline for the product, each version can override it (e.g. patched versions marked unaffected).
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| Linux | Linux | unaffected |
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| Linux | Linux | affected |
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No data.
No data.
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| Linux | Linux |
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| Linux | Linux |
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| Linux | Linux Kernel |
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| Linux | Linux Kernel |
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| Source | ID | Title |
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Ubuntu USN |
USN-9019-1 | Linux kernel (Azure) vulnerabilities |
Ubuntu USN |
USN-9020-1 | Linux kernel vulnerabilities |
No CVSS v4.0
No CVSS v3.0
No CVSS v2
This CVE is not in the KEV list.
Exploit prediction score: < 1% (0.192% probability within 30 days)
Key SSVC decision points have not yet been added.
| Type | Values Removed | Values Added |
|---|---|---|
| Weaknesses | CWE-772 | |
| References |
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| Metrics |
threat_severity
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cvssV3_1
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| Type | Values Removed | Values Added |
|---|---|---|
| First Time appeared |
Linux linux
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| Weaknesses | CWE-760 | |
| Vendors & Products |
Linux linux
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| Description | In the Linux kernel, the following vulnerability has been resolved: irqchip/gic-v5: Immediately exec priority drop following activate With GICv5 an interrupt of equal or lower priority cannot be signalled until there has been a priority drop. This is done via the GIC CDEOI system instruction. Once this has been executed, the hardware is able to signal the next interrupt if there is one. As all interrupts are programmed to have the same priority, no new interrupts can be signalled until the priority drop has happened. This can cause issues when, for example, an interrupt remains active while a long running process takes place, such as when injecting a physical interrupt into a guest VM in software. The GICv5 driver has so far done the priority drop as part of irq_eoi(), i.e., at the same time as deactivating the interrupt. This means that any long running process (or VM) could block incoming interrupts, effectively causing a denial of service for all other interrupts. Rather than doing the EOI as part of irq_eoi() (which the name would suggest would be a good place for it), move it to happen immediately after acknowledging an interrupt in the main GICv5 interrupt handler. The deactivation of interrupts (GIC CDDI) remains implemented as part of irq_eoi(), which means that the same interrupt cannot be signalled a second time until deactivated by software. | |
| Title | irqchip/gic-v5: Immediately exec priority drop following activate | |
| First Time appeared |
Linux
Linux linux Kernel |
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| CPEs | cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | |
| Vendors & Products |
Linux
Linux linux Kernel |
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| References |
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