arm64/boot: Disable trapping of PMZR_EL0 writes to EL2
Default status is the baseline for the product, each version can override it (e.g. patched versions marked unaffected).
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| Linux | Linux | unaffected |
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| Linux | Linux | affected |
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| Linux | Linux Kernel |
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| Source | ID | Title |
|---|---|---|
Debian DLA |
DLA-4850-1 | linux-6.12 security update |
Ubuntu USN |
USN-9019-1 | Linux kernel (Azure) vulnerabilities |
Ubuntu USN |
USN-9020-1 | Linux kernel vulnerabilities |
No CVSS v4.0
No CVSS v3.0
No CVSS v2
This CVE is not in the KEV list.
Exploit prediction score: < 1% (0.200% probability within 30 days)
Key SSVC decision points have not yet been added.
| Type | Values Removed | Values Added |
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| Weaknesses | CWE-665 |
| Type | Values Removed | Values Added |
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| Weaknesses | CWE-617 | |
| References |
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| Metrics |
threat_severity
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cvssV3_1
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| Type | Values Removed | Values Added |
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| Weaknesses | CWE-665 |
| Type | Values Removed | Values Added |
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| Description | In the Linux kernel, the following vulnerability has been resolved: arm64/boot: Disable trapping of PMZR_EL0 writes to EL2 __init_el2_fgt2() writes one mask to both HDFGRTR2_EL2 and HDFGWTR2_EL2. PMZR_EL0 is write-only, so its trap bit, nPMZR_EL0, exists only in HDFGWTR2_EL2 and is therefore never set: a PMZR_EL0 write from the host traps to EL2, where the nVHE hypervisor has no handler and BUG()s. The kernel never writes PMZR_EL0, but kernel.perf_user_access=1 has the PMU driver set PMUSERENR_EL0.UEN for a task with a user-read event, so a write from EL0 reaches the trap and takes the host down without a panic message. Accumulate the HDFGWTR2_EL2 bits separately, as __init_el2_fgt() already does for HDFGWTR_EL2, and set nPMZR_EL0 with the other FEAT_PMUv3p9 bits. | |
| Title | arm64/boot: Disable trapping of PMZR_EL0 writes to EL2 | |
| First Time appeared |
Linux
Linux linux Kernel |
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| CPEs | cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | |
| Vendors & Products |
Linux
Linux linux Kernel |
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| References |
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