spi: spi-qpic-snand: write the feature value before executing SET_FEATURE
Default status is the baseline for the product, each version can override it (e.g. patched versions marked unaffected).
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| Linux | Linux | unaffected |
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| Linux | Linux | affected |
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| Linux | Linux Kernel |
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| Linux | Linux Kernel |
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| Source | ID | Title |
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Ubuntu USN |
USN-9019-1 | Linux kernel (Azure) vulnerabilities |
Ubuntu USN |
USN-9020-1 | Linux kernel vulnerabilities |
No CVSS v4.0
No CVSS v3.0
No CVSS v2
This CVE is not in the KEV list.
Exploit prediction score: < 1% (0.194% probability within 30 days)
Key SSVC decision points have not yet been added.
| Type | Values Removed | Values Added |
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| Weaknesses | CWE-805 | |
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threat_severity
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threat_severity
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| Weaknesses | CWE-119 CWE-120 |
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| Metrics |
cvssV3_1
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| Type | Values Removed | Values Added |
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| Weaknesses | CWE-119 CWE-120 |
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| Weaknesses | CWE-119 CWE-125 CWE-482 |
| Type | Values Removed | Values Added |
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| Weaknesses | CWE-119 CWE-125 CWE-482 |
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| Description | In the Linux kernel, the following vulnerability has been resolved: spi: spi-qpic-snand: write the feature value before executing SET_FEATURE qcom_spi_send_cmdaddr() programs NAND_FLASH_CMD/NAND_EXEC_CMD and submits the descriptors, which makes the controller execute the command immediately. For SPINAND_SET_FEATURE the value to be written is only placed into NAND_FLASH_FEATURES afterwards, by qcom_spi_io_op(), in a second submission - so the chip is programmed with whatever that register happened to hold from a previous operation, and the intended value is only applied by the *next* SET_FEATURE. Measured on a TP-Link Archer AX55 v1 (IPQ5018, ESMT F50L1G41LB): writing 0x40 to the configuration register (0xb0) leaves the chip at 0x00, and the subsequent write of 0x00 leaves it at 0x40 - every write lands one operation late. This stayed unnoticed until v6.18 added SPI-NAND OTP support together with OTP entries for ESMT chips. spinand_otp_rw() enables OTP mode, reads, and disables it again, and mtd_otp_nvmem_add() does this during MTD registration. With the off-by-one, the "disable" write actually applies the previously requested value, so CFG_OTP_ENABLE ends up set: the chip stays in OTP mode, every subsequent array read returns the OTP area instead of the array (UBI reports an empty device) and all writes fail with -EIO because the OTP area is write protected. On this board that makes the whole flash unusable and the device unbootable. Write the feature value into NAND_FLASH_FEATURES as part of the same transaction, before NAND_EXEC_CMD. While at it, copy only the bytes the operation actually carries - the previous code dereferenced a 4-byte pointer on a one-byte buffer (spinand->scratchbuf). With this patch the flash contents read back bit-identical to a known-good dump of the same board taken under the vendor firmware (md5-verified across partitions), and writes work. | |
| Title | spi: spi-qpic-snand: write the feature value before executing SET_FEATURE | |
| First Time appeared |
Linux
Linux linux Kernel |
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| CPEs | cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* | |
| Vendors & Products |
Linux
Linux linux Kernel |
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| References |
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