CVE-2026-20760

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{}

{"affected": [{"configurations": [{"platform": null, "status": "affected", "versions": null}], "enrichment": {"confidence": 80.0, "confidence_source": "inferred", "scores": [{"score": 80.0, "source": "inferred"}, {"score": 94.0, "source": "matching"}]}, "original": {"product": "Intel(R) Processors", "source": "cna", "vendor": "n/a"}, "product": "intel_processors", "vendor": "intel"}], "created": "2026-08-12T21:45:10.342701+00:00", "title": "Privilege Escalation via Improper Memory Range Handling in Intel Microcode", "updated": "2026-08-13T10:30:04.670151+00:00", "vendors": ["intel", "intel$PRODUCT$intel_processors"]}