CVE-2025-63384

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{"affected": [{"affectedData": [{"product": "n/a", "vendor": "n/a", "versions": [{"status": "affected", "version": "n/a"}]}], "source": "cve@mitre.org"}], "configurations": [{"nodes": [{"cpeMatch": [{"criteria": "cpe:2.3:a:chipsalliance:rocketchip:*:*:*:*:*:*:*:*", "matchCriteriaId": "09DDD465-2972-437C-B35E-27B6733A70E1", "versionEndIncluding": "1.6", "vulnerable": true}], "negate": false, "operator": "OR"}]}], "cveTags": [], "descriptions": [{"lang": "en", "value": "A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability."}, {"lang": "es", "value": "Se descubri\u00f3 una vulnerabilidad en RISC-V Rocket-Chip v1.6 y versiones anteriores, donde la instrucci\u00f3n SRET (Supervisor-mode Exception Return) no logra transicionar correctamente el nivel de privilegio del procesador. En lugar de bajar de categor\u00eda desde el modo M\u00e1quina (M-mode) a modo Supervisor (S-mode) seg\u00fan lo especificado por el bit sstatus.SPP, el procesador permanece incorrectamente en M-mode, lo que lleva a una vulnerabilidad cr\u00edtica de retenci\u00f3n de privilegios."}], "id": "CVE-2025-63384", "lastModified": "2026-06-17T09:53:03.867", "metrics": {"cvssMetricV31": [{"cvssData": {"attackComplexity": "LOW", "attackVector": "NETWORK", "availabilityImpact": "NONE", "baseScore": 6.5, "baseSeverity": "MEDIUM", "confidentialityImpact": "HIGH", "integrityImpact": "NONE", "privilegesRequired": "LOW", "scope": "UNCHANGED", "userInteraction": "NONE", "vectorString": "CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N", "version": "3.1"}, "exploitabilityScore": 2.8, "impactScore": 3.6, "source": "134c704f-9b21-4f2e-91b3-4a467353bcc0", "type": "Secondary"}], "ssvcV203": [{"source": "134c704f-9b21-4f2e-91b3-4a467353bcc0", "ssvcData": {"id": "CVE-2025-63384", "options": [{"exploitation": "none"}, {"automatable": "no"}, {"technicalImpact": "total"}], "role": "CISA Coordinator", "timestamp": "2025-11-12T20:38:19.765486Z", "version": "2.0.3"}}]}, "published": "2025-11-10T20:15:49.013", "references": [{"source": "cve@mitre.org", "tags": ["Exploit", "Third Party Advisory"], "url": "https://github.com/107040503/RISC-V-Vulnerability-Disclosure_SRET"}, {"source": "cve@mitre.org", "tags": ["Product"], "url": "https://github.com/chipsalliance/rocket-chip.git"}], "sourceIdentifier": "cve@mitre.org", "vulnStatus": "Analyzed", "weaknesses": [{"description": [{"lang": "en", "value": "CWE-266"}], "source": "134c704f-9b21-4f2e-91b3-4a467353bcc0", "type": "Secondary"}]}

{}

{"created": "2025-11-12T12:50:00.252147+00:00", "updated": "2025-11-12T12:50:00.253788+00:00", "vendors": ["chipsalliance", "chipsalliance$PRODUCT$rocket-chip"]}