CVE-2025-54520

Published Sep 24, 2025 CVSS 4.0 · 8.6 High EPSS < 1% KEV · Not listed
Description
Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.

Remediation

No solution or workaround provided in the CVE record

Tracking

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Advisories

Source ID Title
EUVD EUVD EUVD-2025-31074 Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.
History
Type Values Removed Values Added
Metrics ssvc

{'options': {'Automatable': 'no', 'Exploitation': 'none', 'Technical Impact': 'total'}, 'version': '2.0.3'}

Type Values Removed Values Added
First Time appeared Amd
Amd artix 7-series Fpga
Amd kintex 7-series Fpga
Vendors & Products Amd
Amd artix 7-series Fpga
Amd kintex 7-series Fpga
Type Values Removed Values Added
Description Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.
Weaknesses CWE-1247
References
Metrics cvssV4_0

{'score': 8.6, 'vector': 'CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H'}

Weaknesses

Sources

Status
PUBLISHED
Assigner
AMD
Published
Updated
Sep 25, 2025, 1:48 PM
Reserved
Jul 23, 2025, 3:01 PM
Status
Deferred
Published
Sep 24, 2025, 10:15 PM
Modified
Jun 17, 2026, 9:40 AM