Semtech LR11xx Memory Write Access Control Bypass
Default status is the baseline for the product, each version can override it (e.g. patched versions marked unaffected).
| Vendor | Product | Default status | Versions | ||||||
|---|---|---|---|---|---|---|---|---|---|
| Semtech | LR1110 | unaffected |
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| Semtech | LR1120 | unaffected |
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| Semtech | LR1121 | unaffected |
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No data.
No data.
| Vendor | Product | Versions | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Semtech | Lr1110 |
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| Semtech | Lr1120 |
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| Semtech | Lr1121 |
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No CVSS v3.1
No CVSS v3.0
No CVSS v2
This CVE is not in the KEV list.
Exploit prediction score: < 1% (0.253% probability within 30 days)
| Type | Values Removed | Values Added |
|---|---|---|
| Metrics |
ssvc
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| Type | Values Removed | Values Added |
|---|---|---|
| Description | An improper access control vulnerability exists in Semtech LoRa LR11xxx transceivers running early versions of firmware where the memory write command accessible via the physical SPI interface fails to enforce write protection on the program call stack. An attacker with physical access to the SPI interface can overwrite stack memory to hijack program control flow and achieve limited arbitrary code execution. However, the impact is limited to the active attack session: the device's secure boot mechanism prevents persistent firmware modification, the crypto engine isolates cryptographic keys from direct firmware access, and all modifications are lost upon device reboot or loss of physical access. | |
| Title | Semtech LR11xx Memory Write Access Control Bypass | |
| First Time appeared |
Semtech
Semtech lr1110 Semtech lr1120 Semtech lr1121 |
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| Weaknesses | CWE-123 | |
| CPEs | cpe:2.3:a:semtech:lr1110:*:*:*:*:*:*:*:* cpe:2.3:a:semtech:lr1120:*:*:*:*:*:*:*:* cpe:2.3:a:semtech:lr1121:*:*:*:*:*:*:*:* |
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| Vendors & Products |
Semtech
Semtech lr1110 Semtech lr1120 Semtech lr1121 |
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| References |
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| Metrics |
cvssV4_0
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