CVE-2024-30212

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If RAM contains \npointers, those can be - depending on the application - overwritten to<br>\nreturn data from any other offset including Progam and Boot Flash.\n\n<br>"}], "value": "If a SCSI READ(10) command is initiated via USB using the largest LBA \n(0xFFFFFFFF) with it's default block size of 512 and a count of 1,\n\nthe first 512 byte of the 0x80000000 memory area is returned to the \nuser. If the block count is increased, the full RAM can be exposed.\n\nThe same method works to write to this memory area. If RAM contains \npointers, those can be - depending on the application - overwritten to\n\nreturn data from any other offset including Progam and Boot Flash."}], "impacts": [{"capecId": "CAPEC-92", "descriptions": [{"lang": "en", "value": "CAPEC-92: Forced Integer Overflow"}]}], "metrics": [{"cvssV4_0": {"Automatable": "NOT_DEFINED", "Recovery": "NOT_DEFINED", "Safety": "NOT_DEFINED", "attackComplexity": "LOW", "attackRequirements": "NONE", "attackVector": "PHYSICAL", "baseScore": 7, "baseSeverity": "HIGH", "privilegesRequired": "NONE", "providerUrgency": "NOT_DEFINED", "subAvailabilityImpact": "NONE", "subConfidentialityImpact": "NONE", "subIntegrityImpact": "NONE", "userInteraction": "NONE", "valueDensity": "NOT_DEFINED", "vectorString": "CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N", "version": "4.0", "vulnAvailabilityImpact": "HIGH", "vulnConfidentialityImpact": "HIGH", "vulnIntegrityImpact": "HIGH", "vulnerabilityResponseEffort": "NOT_DEFINED"}, "format": "CVSS", "scenarios": [{"lang": "en", "value": "GENERAL"}]}], "problemTypes": [{"descriptions": [{"cweId": "CWE-190", "description": "CWE-190: Integer Overflow or Wraparound", "lang": "en", "type": "CWE"}]}], "providerMetadata": {"orgId": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5", "shortName": "Microchip", "dateUpdated": "2024-06-11T11:32:35.566Z"}, "references": [{"tags": ["patch", "mitigation"], "url": "https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216"}, {"tags": ["release-notes"], "url": "https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md"}, {"url": "https://github.com/Fehr-GmbH/blackleak"}], "source": {"advisory": "PSIRT-34", "discovery": "UNKNOWN"}, "timeline": [{"lang": "en", "time": "2023-08-21T07:00:00.000Z", "value": "Detected"}], "title": "Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command", "x_generator": {"engine": "Vulnogram 0.2.0"}}, "adp": [{"providerMetadata": {"orgId": "af854a3a-2127-422b-91ae-364da2661108", "shortName": "CVE", "dateUpdated": "2024-08-02T01:25:03.425Z"}, "title": "CVE Program Container", "references": [{"tags": ["patch", "mitigation", "x_transferred"], "url": "https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216"}, {"tags": ["release-notes", "x_transferred"], "url": "https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md"}, {"url": "https://github.com/Fehr-GmbH/blackleak", "tags": ["x_transferred"]}]}, {"affected": [{"vendor": "microchip", "product": "mplab_harmony", "cpes": ["cpe:2.3:a:microchip:mplab_harmony:*:*:*:*:*:*:*:*"], "defaultStatus": "unknown", "versions": [{"version": "3.0.0", "status": "affected", "lessThan": "3.13.4", "versionType": "semver"}]}], "metrics": [{"other": {"type": "ssvc", "content": {"timestamp": "2024-08-07T14:20:02.167062Z", "id": "CVE-2024-30212", "options": [{"Exploitation": "poc"}, {"Automatable": "no"}, {"Technical Impact": "partial"}], "role": "CISA Coordinator", "version": "2.0.3"}}}], "title": "CISA ADP Vulnrichment", "providerMetadata": {"orgId": "134c704f-9b21-4f2e-91b3-4a467353bcc0", "shortName": "CISA-ADP", "dateUpdated": "2024-09-06T17:46:22.690Z"}}]}, "dataVersion": "5.1"}

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