CVE-2023-5138

Glitch detection not active by default in Silicon Labs Secure Vault High devices

Published Jan 3, 2024 CVSS 3.1 · 6.8 Medium EPSS < 1% KEV · Not listed
Description
Glitch detection is not enabled by default for the CortexM33 core in Silicon Labs secure vault high parts EFx32xG2xB, except EFR32xG21B.

Remediation

No solution or workaround provided in the CVE record

Tracking

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Advisories

Source ID Title
EUVD EUVD EUVD-2023-57476 Glitch detection is not enabled by default for the CortexM33 core in Silicon Labs secure vault high parts EFx32xG2xB, except EFR32xG21B.
History
Type Values Removed Values Added
Metrics ssvc

{'options': {'Automatable': 'no', 'Exploitation': 'none', 'Technical Impact': 'total'}, 'version': '2.0.3'}

Type Values Removed Values Added
Weaknesses CWE-1319
Weaknesses

Sources

Status
PUBLISHED
Assigner
Silabs
Published
Updated
Jun 3, 2025, 2:43 PM
Reserved
Sep 22, 2023, 9:13 PM
Status
Modified
Published
Jan 3, 2024, 11:15 PM
Modified
Jun 17, 2026, 6:47 AM