CVE-2020-24512

hw: observable timing discrepancy in some Intel Processors

Published Jun 9, 2021 CVSS 3.1 · 3.3 Low EPSS < 1% KEV · Not listed
Description
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.

Remediation

No solution or workaround provided in the CVE record

Tracking

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Advisories

Source ID Title
Debian DLA Debian DLA DLA-2718-1 intel-microcode security update
Debian DSA Debian DSA DSA-4934-1 intel-microcode security update
EUVD EUVD EUVD-2020-17232 Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Ubuntu USN Ubuntu USN USN-4985-1 Intel Microcode vulnerabilities
History
Type Values Removed Values Added
Metrics ssvc

{'options': {'Automatable': 'no', 'Exploitation': 'none', 'Technical Impact': 'partial'}, 'version': '2.0.3'}